Davoud Bahrepour

Ph.D. Candidate in Science and Research Branch, Islamic Azad University, Tehran, Iran.

Head of Information Technology Department in Islamic Azad University, Mashhad Branch.

Bahrepour{at}ieee{dot}org
--> please replace {at} with @ and {dot} with

Computer Architecture, Digital Circuit Design,

VLSI Design, Mixed Mode Logic,

Single Electron Devices, Quantum phenomena,

Molecular Electronics,

Cloud Computing, Internet Social Network.

A Macro model Simulator for RTD circuits

Presenting New Models for Single Electron Tunneling Devices

Configurable cells based on Single Electron Tunneling Devices

Molecular Electronics

Cloud Computing

Internet Social Networks

Computer Architecture
Digital Logic Circuit Analysis & Design
Assembly Language Programming
Microprocessors & Microcontrollers

Journal Publications:

1. Introducing a Technology Index Concept and Optimum Performance Design Procedure for Single-Electron-Device Based Circuits,

Microelectronics Journal (Elsevier Publication), May, 2011.

2. New RTD-Based General Threshold Gate Topologies and Application to Three-Input XOR Logic Gates,

Journal of Electrical and Computer Engineering (Hindawi Publication), Volume 2010.

3. New Three-Input XOR and XNOR Gates Based on MOBILE and Application to a Full Adder,

International Journal of Recent Trends in Engineering, Vol. 2, no. 5, November 2009.

4. A New XOR Structure Based on Resonant-Tunneling High Electron Mobility Transistor,

VLSI Design (Hindawi Publication), vol. 2009, 2009

5. A Novel Five-Input Configurable Cell Based on Irreversible Single Electron Box,

Journal of Contemporary Engineering Sciences, Vol. 2, no. 4, pp. 149 – 162, 2009.

Conference Publications:

1. A New Single Electron Tunneling Cell Based on Linear Threshold Gate

International IEEE Conference on Enabling Science and Nanotechnology, 1-3 December, 2010.

2. A Time-Dependent SPICE Model for Single Electron Box and Its Application to Logic Gates at Low and High Temperatures

International IEEE Conference on Enabling Science and Nanotechnology, 1-3 December, 2010.

3. New Three-Input XOR and XNOR Gates Based on Generalized Threshold Gates Using RTDs,

2nd IEEE International Conference on Adaptive Science & Technology, 2009. ICAST 2009, pp.9-13, 14-16 Jan. 2009.

4. A novel Middleware model for Web Based Programming,

IEEE International Conference on Information and Communication Technologies from Theory to Applications, April 2008.

5. A Gate Level Simulator for Single Electron Multi Valued Logic Based Circuits,

Proceedings of 16th Iranian Conference on electrical engineering, Tarbiat Moddares Uneversity. May, 2008.

6. A Configurable Cell Based on Irreversible Single Electron Box,

Proceedings of 13th National CSI Computer Conference, Sharif University of Technology, March, 2008.

7. A Novel Buffer based on Irreversible Single Electron Box,

Proceedings of Iran’s Second Regional Conference, Ferdows, March, 2008.

8. High Speed saturating Counter based on Single Electron Devices,

Proceedings of 12th International CSI Computer Conference, Shahid Beheshti University, February. 2007.